This relates to compensation for delays in signal propagation in a circuit.
Many electronic systems require synchronization between two or more signals propagating in the system. For example, data is often transmitted to a data processing device in the system, e.g., a central processing unit (CPU) or a programmable logic device (PLD), from a memory device, through a set of communication channels. The set of communication channels typically includes one or more channels carrying data signals and one channel carrying a data strobe signal (or clock signal), whose rising/falling edges are used to sample the data signals at the memory device, the data processing device, and/or other points in the circuit. To sample the data signals accurately, it is preferred that there be a phase delay between the data signals and the clock signal so that a data sampling edge of the clock signal is positioned within a data sampling window associated with the data signals. In some systems, the clock signal preferably is at the center of the data sampling window and has a phase delay of approximately 90 degrees with respect to the data signal.
There are many factors, however, that can change the rate of propagation of a signal in a circuit. For example, process, voltage and temperature (PVT) effects, resistance/capacitance effects of circuits, delays caused by analog elements that do not track delays caused by digital circuits, and wire delays in circuit boards can all affect the rate of signal propagation. As a result, skew or phase delay may arise between two propagating signals where it is not wanted; and compensation for such delay is needed.